1. Field of the Invention
The present invention relates to the control of a liquid crystal display.
2. Description of the Related Art
The liquid crystal display, whose electric power consumption is small, is installed in various electronic equipments. In recent years, the cellular telephone, the PDA (Personal Digital Assistant) and a large screen television and the like have been penetrated in the market, and the color TFT-LCD (Thin Film Transistor Liquid Crystal Display) has been used as the display of those devices. The liquid crystal display includes an LCD panel and a drive unit. Typically, the LCD panel of the large screen liquid crystal display is driven at a block unit. Block units included in a LCD panel are driven by the respective driver Large Scale Integrated Circuits.
Also, a color liquid crystal display can display grayscale images. The color liquid crystal display presently supplied on the market can represent the grayscale tones of 6 bits (about 260,000 colors). Moreover, products that can cope with the grayscale representation of 8 bits (about 16,700,000 colors) as well as 10 bits (about 1,000,000,000 colors) are being developed.
Recently, a COG (Chip on Glass) technology is used to integrate an LCD panel and an LCD driver into a single unit module. Since an LCD panel and an LCD driver are made into a module, the volume of the driver unit is reduced, thereby the cost of the liquid crystal display is reduced.
In such a liquid crystal display, the LCD driver has a grayscale power source circuit used to determine a gamma characteristic. The grayscale power source circuit generates a grayscale voltage, in response to the property of the LCD panel. The conventional liquid crystal display has the IC constituting the LCD driver, and other IC for the grayscale power source. The grayscale power source IC is used to adjust the gamma characteristic of the LCD driver contained in the liquid crystal display. Also, in association with the recent advancement of a semiconductor technique, an LCD driver IC including the grayscale power source circuit is developed, which enables the cost reduction of the liquid crystal display. In such a LCD driver, an operational amplifier of the grayscale power source circuit is constituted by CMOS.
In a typical MOS transistor, gm (mutual conductance) that determines a driving property is smaller than the gm of the bipolar transistor. Thus, in the grayscale power source circuit composed of MOS transistors, it is sometimes difficult to ensure a margin of the driving performance as compared with the grayscale power source circuit composed of bipolar transistors. Hence, a technique for generating a suitable grayscale voltage by devising the circuit structure is desired (for example, refer to Japanese Laid Open Patent Application JP-A-Heisei, 10-142582 and JP-A-Heisei, 6-348235).
FIG. 1 is a block diagram showing the configuration of the liquid crystal display noted in Japanese Laid Open Patent Application (JP-A-Heisei, 10-142582). Hereafter, the case where a displaying signal processed by a data driver is the digital signal of 6-bit is explained. With reference to FIG. 1, a conventional LCD data driver 111 is provided with: a data register 101 for receiving displaying signals RBG (Red, Green and Blue) from outside; a latch circuit 102 for latching a 6-bit digital signal in synchronization with a strobe signal ST; a D/A converter 103 composed of digital/analog converters of parallel N stages; a grayscale voltage generation circuit 104 having the gamma conversion characteristic adjusted to be matching with the property of a liquid crystal; and an output amplification unit 105 that has N voltage followers (105-1 to 105-n) for buffering voltages from the D/A converter 103.
The LCD panel 112 includes pixels (108-1 to 108-n) installed at the intersections between data lines and scanning lines. Each of the plurality of pixels (108-1 to 108-n) is composed of thin film transistor (TFT) and pixel capacitor 107.
In each of the thin film transistors (106-1 to 106-n) contained in the pixels, the gate is connected to the scanning line and the source is connected to the data line. Also, in each of the pixel capacitors (107-1 to 107-n) contained in the pixels, one end is connected to the respective drain of the thin film transistors (106-1 to 106-n), and the other end is connected to the COM terminal. FIG. 1 diagrammatically shows the configuration of the pixels corresponding to one column for supporting the easy understanding of the structure of the LCD panel 112. The N thin film transistors (TFTs) are formed correspondingly to a plurality of columns (M columns). An LCD gate driver (not shown) is connected to each gate line of the LCD panel 112, and sequentially drives the gates of the respective thin film transistors.
The D/A converter 103 executes a D/A conversion on the 6-bit digital displaying signal of the latch circuit 102 and sends to the N voltage followers (105-1 to 105-n) contained in the output amplification unit 105. The data outputted from the output amplification unit 105 is applied via the thin film transistors (106-1 to 106-n) to liquid crystal elements serving as the pixel capacitors (107-1 to 107-n).
The grayscale voltage generation circuit 104 generates a reference grayscale voltage and sends it to the D/A converter 103. In the D/A converter 103, a decoder constituted by a ROM switch or the like (not shown) selects the reference grayscale voltage.
The configuration of the conventional grayscale voltage generation circuit 104 will be described below. FIG. 2 is a circuit diagram showing the configuration of the grayscale voltage generation circuit 104 noted in Japanese Laid Open Patent Application (JP-A-Heisei, 10-142582). The grayscale voltage generation circuit 104 has a resistor ladder circuit. This is designed to be driven by a voltage follower, in order to drop the impedance at each reference voltage point and execute minor adjustment of the reference voltage.
With reference to FIG. 2, the conventional grayscale voltage generation circuit 104 is provided with an external ladder resistor circuit 201, a buffer amplifier 202, a built-in ladder resistor circuit 203 and a constant voltage generating circuit 204. As shown in FIG. 2, the LCD driver built-in resistor ladder circuit 203 includes built-in resistors (2031 to 203n−1). Also, the external resistor ladder circuit 201 includes external ladder resistors (2010 to 201n−1) Moreover, the buffer amplifier 202 includes operational amplifiers (2021 to 202n).
Each of the operational amplifiers is constituted of a voltage follower configured to feed the output signal back to the inverting input terminal. The external ladder resistors constituting the external resistor ladder circuit 201 are constituted of variable resistors and adjust the voltages applied to the operational amplifiers (2021 to 202n) By such a configuration, the conventional grayscale voltage generation circuit 104 generates the adjustment voltage corresponding to the property of the liquid crystal panel. The voltage supplied to the external ladder resistor circuit 201 is a reference supply voltage Vr generated by the ground potential GND and the constant voltage generating circuit 204. The reference supply voltage Vr is given by a stable external constant voltage generating circuit, for example, a band gap reference.
Here, the resistances of the built-in resistors (2031 to 203n−1) are assumed as follows.    First Built-in Resistor 2031=R1 [Ω]    Second Built-in Resistor 2032=R2 [Ω]- - -    (n−2)-th Built-in Resistor 203n−2=Rn−2 [Ω]    (n−1)-th Built-in Resistor 203n−1=Rn−1 [Ω]
The resistances of the external ladder resistors (2010 to 201n−1) are assumed as follows.    First External Ladder Resistor 2010=R′0 [Ω]    Second External Ladder Resistor 2011=R′1 [Ω]- - -    (n−1)-th External Ladder Resistor 201n−2=R′n−2 [ΩQ]    n-th External Ladder Resistor 201n−1=R′n−1 [Ω]
Then, in the liquid crystal grayscale voltage generation circuit shown in FIG. 2, the grayscale voltages Vn, Vn−1, Vn−2, - - - , V2 and V1 are determined by the resistances R′0, R′1, R′2, - - - , R′n−2 and R′n−1 of the external ladder resistors (2010 to 201n−1) constituting the external ladder resistor circuit 201.
That is, each of the voltages outputted from the built-in ladder resistor circuit 203 is represented as follows.V=Vr Vn−1=Vr{(R′n−2+R′n−3+ - - - R′0)/(R′n−1+R′n−2+R′n−3+ - - - +R′0)}V1=Vr{R′0/(R′n−1+R′n−2+R′n−3+ - - - R′0)}
Here, if the ratio between the resistances (R1, R2, - - - , Rn−2 and Rn−1) of the built-in resistors (2031 to 203n−1) to determine the grayscale voltage therein and the ratio between the resistances (R′1, R′2, - - - , R′n−2 and R′n−1) of the external ladder resistors (2010 to 201n−1) are equal to each other, the output currents of the operational amplifiers (2021 to 202n) become zero.
However, the output current In of the n-th operational amplifier 202n (the operational amplifier arranged in n-th position from the GND side) is given by the following equation in the discharging direction.
                              I          n                =                                            (                                                V                  n                                -                                  V                  1                                            )                        ⁢                          /                        ⁢                          (                                                R                  1                                +                                  R                  2                                +                …                +                                  R                                      n                    -                    1                                                              )                                =                      I            0                                              (        1        )            
Also, the output current I1 of the first operational amplifier 2021 (the operational amplifier arranged in the first position from the GND side) is given by the following equation in the absorbing direction.
                              I          1                =                                            (                                                V                  n                                -                                  V                  1                                            )                        ⁢                          /                        ⁢                          (                                                R                  1                                +                                  R                  2                                +                …                +                                  R                                      n                    -                    1                                                              )                                =                      I            0                                              (        2        )            
As mentioned above, the respective amplifiers in the n-th operational amplifier 202n and the first operational amplifier 2021 are provided with the output stages that can drive those output currents.
FIG. 3 is a block diagram showing the configuration of the LCD data driver having a plurality of driver circuits. In the following explanation, for the easy understanding of the conventional technique, the LCD data driver where in the two driver circuits, the data line of the LCD panel 112 is driven is exemplified. In this case, the two driver circuits 205 in the conventional data driver 111 are similarly configured. Also, to the function blocks which are same with or similar to the function blocks of the data driver 111 in FIG. 1, the symbols same with those of FIG. 1 are assigned, and the redundant explanation will be avoided. The following explanations can be equally applied to any one of the driver circuits 205.
With reference to FIG. 3, the driver circuit 205 is provided with the data register 101, the latch circuit 102, the D/A converter 103, the output amplification unit 105 and a grayscale voltage output circuit 206. The grayscale voltage output circuit 206 is composed of: a first grayscale resistor group for generating a positive grayscale voltage; a second grayscale resistor group for generating a negative grayscale voltage; a first operational amplifier 301; a second operational amplifier 302; a third operational amplifier 303; and a fourth operational amplifier 304. As shown in FIG. 3, the first operational amplifier 301 is constituted by an operational amplifier, the terminals of which are connected as the voltage follower, and supplies the highest potential in the first grayscale resistor group. The second operational amplifier 302 is constituted by an operational amplifier, the terminals of which are connected as the voltage follower, and supplies the lowest potential in the first grayscale resistor group. The third operational amplifier 303 is constituted by an operational amplifier, the terminals of which are connected as the voltage follower, and supplies the highest potential in the second resistor group. The fourth operational amplifier 304 is constituted by operational amplifier, the terminals of which are connected as the voltage follower, and supplies the lowest potential in the second resistor group.
With reference to FIG. 3, in the conventional driver circuit 205, a first power source 207 (VH+) is connected to the non-inverting input terminal of the first operational amplifier 301, a second power source 208 (VL+) is connected to the non-inverting input terminal of the second operational amplifier 302, a third power source 209 (VH−) is connected to the non-inverting input terminal of the third operational amplifier 303, and a fourth power source 210 (VL−) is connected to the non-inverting input terminal of the fourth operational amplifier 304. As shown in FIG. 3, in the two driver circuits 205, the non-inverting input terminals of the first operational amplifier (voltage follower) 31 to fourth operational amplifier 304 are commonly connected. The first to fourth power sources 207 to 210 require the buffer amplifiers, because they are usually constructed by resistance division so that their impedances are high. The first to fourth operational amplifiers 301 to 304 act as the buffer amplifiers. For example, in the LCD panel 112 of a normally white type, the high potential of the positive grayscale corresponds to the black level, and the low potential corresponds to the white level. Moreover, the low potential of the negative grayscale corresponds to the black level, and the high potential corresponds to the white level. Thus, in the data driver 111, the voltages of the first to fourth power sources 207 to 210 are set so as to obtain the foregoing grayscale.
In Japanese Laid Open Patent Application (JP-A-Heisei, 5-119744), a liquid crystal display driven by a plurality of drivers is described.